Instantaneous voltage lowering detection device

ABSTRACT

An instantaneous voltage dip detection device is provided with: all-pass filter ( 2 ) for phase shifting a supply voltage waveform ( 11 ) by 90°; a comparator  7  that outputs a signal when the supply voltage waveform ( 11 ) is smaller than a threshold ( 12 ) in regions of π/4 to 3π/4, 5π/4 to 7π/4; a comparator ( 8 ) that outputs a signal when a phase shift voltage waveform ( 13 ) is smaller than a threshold ( 14 ) in regions of 0 to π/4, 3π/4 to 5π/4, 7π/4 to 2π; an OR circuit ( 9 ) to which signals from the comparators ( 7 ), ( 8 ) are inputted; and a signal generator ( 10 ) for generating a voltage dip detection signal in response to an output from the OR circuit ( 9 ).

TECHNICAL FIELD

This invention relates to an instantaneous voltage dip detection devicefor detecting an instantaneous voltage dip in distribution network thatoccurs due to lightning or the like.

BACKGROUND ART

As has been disclosed, for example, in the Japanese Patent Publication(unexamined) 2000-55947 and the Japanese Patent Publication (unexamined)2002-171690 respectively, according to the publicly known instantaneousvoltage dip detection devices, results of subtraction between anabsolute value waveform of a reference sine wave and a reference cosinewave each synchronizing with a supply voltage and an absolute valuewaveform of a supply sine wave and a supply cosine wave are respectivelyobtained; the obtained results of subtraction are then integrated; andin the case where any of the results of integration exceeds a referencevalue, it is determined that a voltage dip has occurred.

In the aforementioned conventional system, however, since theintegration is utilized for the detection of voltage dip, a problemexists in that it takes a time of about ¼ cycle of an AC waveform in thedetection and determination. Moreover, another problem exists in that ifarranging an instantaneous voltage dip compensating device using such aninstantaneous voltage dip detection device, service interruption over ¼cycle takes place from the start of voltage dip up to the switching tothe voltage dip compensating operation.

DISCLOSURE OF INVENTION

This invention was made to solve the above-discussed problems and has anobject of providing a system for detecting a voltage dip at a highspeed.

To accomplish the foregoing object, an instantaneous voltage dipdetection device according to this invention is characterized byincluding:

-   -   phase shifting means for shifting a supply voltage waveform by a        predetermined angle and generating a phase shift voltage        waveform;    -   phase lock means for detecting the zero voltage phase of the        supply voltage waveform;    -   supply voltage waveform threshold generating means for        generating a supply voltage waveform threshold acting as a        voltage dip determination reference with respect to the        mentioned supply voltage waveform in synchronization with the        mentioned phase lock means;    -   phase shift voltage waveform threshold generating means for        generating a phase shift voltage waveform threshold acting as a        voltage dip determination reference with respect to the        mentioned phase shift voltage waveform;    -   determination region setting means for setting a part or all of        absolute values of the mentioned supply voltage waveform        threshold and phase shift voltage waveform threshold that are        larger than a predetermined value as being a comparative        determination effective region;    -   supply voltage waveform comparing means for outputting a voltage        dip detection signal based on the comparison between the        mentioned supply voltage waveform and the supply voltage        waveform threshold, in the case where the mentioned        determination region setting means determines as being a        comparative determination effective region of the supply voltage        waveform; and    -   phase shift voltage waveform comparing means for outputting a        voltage dip detection signal based on the comparison between the        mentioned phase shift voltage waveform and the phase shift        voltage waveform threshold, in the case where the mentioned        determination region setting means determines as being a        comparative determination effective region of the phase shift        voltage waveform.

Another instantaneous voltage dip detection device according to thisinvention is characterized by including:

-   -   phase lock means for detecting the zero voltage phase of the        supply voltage waveform;    -   supply voltage waveform threshold generating means for        generating a supply voltage waveform threshold acting as a        voltage dip determination reference with respect to the        mentioned supply voltage waveform in synchronization with the        mentioned phase lock means;    -   waveform recording means for recording sequentially supply        voltage waveforms in synchronization with the phase lock means;    -   recorded waveform threshold generating means for generating a        lower limit threshold or an upper limit threshold by a        predetermined calculation based on the mentioned recorded        waveforms;    -   determination region setting means for setting a comparative        determination effective region in synchronization with the phase        lock means;    -   supply voltage waveform comparing means for outputting a voltage        dip detection signal based on the comparison between the        mentioned supply voltage waveform and the supply voltage        waveform threshold, in the case where the mentioned        determination region setting mean-s determines as being a        comparative determination effective region of the supply voltage        waveform;    -   recorded waveform comparing means for outputting a voltage dip        detection signal based on the comparison between the mentioned        supply voltage waveform and the recorded waveform threshold, in        the case where the mentioned determination region setting means        determines as being a comparative determination effective region        of the recorded waveform;    -   continuity determination means for determining that the        mentioned supply voltage waveform comparing means outputs the        voltage dip detection signal continuously for a predetermined        time period;    -   logical multiplication (AND) means between the output of the        supply voltage waveform comparing means and the output of the        recorded waveform comparing means; and    -   voltage dip detection output means for outputting a voltage dip        detection signal by logical addition (OR) means between the        output of the mentioned logical multiplication (AND) means and        the output of the continuity determination means.

According to this invention, since the detection device not using anyintegration but using an instantaneous comparison is used for detectionof a voltage dip, it is possible to detect voltage dip at a high speed.Further, since the detection device not using any integration taking along time (over ¼ cycle) is used for the detection of voltage dip, it ispossible to detect voltage dip at a high speed. Switching a phase to bedetected makes it possible to carry out a determination processing witha high level signal at all times, enabling to perform a stabledetection. Further, carrying out an operation for a short time in alow-level signal region (near zero voltage phase) makes it possible toperform a stable detection. Furthermore, even in the state ofsuperimposed harmonics, a stable detection can be performed by relievingthe threshold conforming to a level of the harmonics and carrying out acomparative determination in comparison with the recorded waveforms.

BRIEF DESCRIPTION OF DRAWINGS

FIG. 1 is a block diagram showing an instantaneous voltage dip detectiondevice according to Embodiment 1 of the present invention.

FIG. 2 is a waveform chart showing each of signal waveforms at thenormal time of the instantaneous voltage dip detection device in FIG. 1.

FIG. 3 is a signal waveform diagram showing each of signal waveforms atthe time of occurrence of a voltage dip in the instantaneous voltage dipdetection device in FIG. 1.

FIG. 4 is a block diagram showing an instantaneous voltage dip detectiondevice according to Embodiment 2 of the invention.

FIG. 5 is a block diagram showing an instantaneous voltage dip detectiondevice according to Embodiment 3 of the invention.

FIG. 6 is a block diagram showing phase shifting means of aninstantaneous voltage dip detection device in detail according toEmbodiment 5 of the invention.

FIG. 7 is a waveform diagram showing phase shift voltage waveformsaccording Embodiment 5 of the invention, and in which phase is invertedby 180 degree and harmonics are superimposed by 5% using an all-passfilter.

FIG. 8 is a waveform diagram showing phase shift voltage waveformsaccording to a comparative example with FIG. 7, and in which phase isinverted by 180 degree and harmonics are superimposed by 5% usingdifferentiation circuit.

FIG. 9 is a waveform diagram showing transient waveforms at the time ofoccurrence of an instantaneous voltage dip of the phase shift means bythe instantaneous voltage dip detection device in detail according toEmbodiment 5 of the invention.

FIG. 10 is a block diagram showing an instantaneous voltage dipdetection device according to Embodiment 10 of the invention.

FIG. 11 is a block diagram showing an instantaneous voltage dipdetection device according to Embodiment 11 of the invention.

BEST MODE FOR CARRYING OUT THE INVENTION Embodiment 1

FIG. 1 is a block diagram showing an instantaneous voltage dip detectiondevice according to Embodiment 1 of the present invention, FIG. 2 is awaveform chart showing each of signal waveforms at the normal time ofthe instantaneous voltage dip detection device in FIG. 1, and FIG. 3 isa signal waveform diagram showing each of signal waveforms at the timeof occurrence of a voltage dip in the instantaneous voltage dipdetection device in FIG. 1.

Now Embodiment 1 is hereinafter described with reference to FIGS. 1 to3. The instantaneous voltage dip detection device shown in FIG. 1includes: phase shift means 2 for shifting a phase of a supply voltagewaveform 11 (see FIG. 2) being a signal waveform of a power supply 1 bya predetermined angle (for example 20° to 160°, more preferably 90°);and phase lock means 3 for detecting zero voltage phase (zero-crosspoint) of the supply voltage waveform. In synchronization with thisphase lock means 3, power supply waveform threshold generating means 4generates a power supply waveform threshold 12 (see FIG. 2) serving as avoltage dip criterion with respect to the supply voltage waveform 11. Onthe other hand, phase shift voltage waveform threshold generating means5 generates a phase shift voltage waveform threshold 14 (see FIG. 2)serving as a voltage dip determination criterion with respect to a phaseshift voltage waveform 13 (see FIG. 2) shifted by about 90° from thezero voltage phase of the supply voltage waveform 11 detected by thephase lock means 3. In the mentioned process, the power supply waveformthreshold generating means 4 and the phase shift voltage waveformthreshold generating means 5 prepare the threshold 12 and the threshold14 by multiplying data of table form, in which phase and amplitude valueof a sine wave (trigonometric function preliminarily stored in a memoryare paired, by a set value set by user or manufacturer, and output them.

For example, in a manufacturing apparatus driven at a supply voltage ofwhich effective value is 200V, when an input voltage has dipped to nothigher than 160V, a set value is 0.8 (=160/200) in order to detect theinstantaneous voltage dip. That is, the threshold 12 and the threshold14 are prepared and outputted so that amplitude is 0 when phase is 0π(=200×√{square root over (2)}×sin(0π)×0.8), amplitude is 80√{square rootover (2)} when phase is π/6 (=200×√{square root over (2)}×sin(π/6)×0.8),amplitude is 160 when phase is π/4 (=200×√{square root over(2)}×sin(π/4)×0.8), and amplitude is 160√{square root over (2)} whenphase is π/2 (=200×√{square root over (2)}×sin(π/2)×0.8).

Determination region setting means 6 is provided to set, insynchronization with the phase lock means, a part of the supply voltagewaveform threshold 12 and phase shift voltage waveform threshold 14 thatare larger than a predetermined value, e.g., apart in which amplitude ofeach threshold is larger than about 70% of a peak value line 100(sin(nπ/4)=0.707 . . . , n=1, 3, 5, 7 . . . ), as being a comparativedetermination effective region. Further, supply voltage waveformcomparing means 7 and phase shift voltage waveform comparing means 8 areprovided. The supply voltage waveform comparing means 7 makes acomparison in magnitude between a supply voltage waveform 11 and asupply voltage waveform threshold 12 in the case where the determinationregion setting means 6 has determined a comparative determination region70 (for example, π/4 to 3π/4, 5π/4 to 7π/4 in FIG. 2) of the supplyvoltage waveform, and then outputs a voltage dip detection signal. Thephase shift voltage waveform comparing means 8 makes a comparison inmagnitude between a phase shift voltage waveform 13 and a phase shiftvoltage waveform threshold 14 in the case where the determination regionsetting means 6 has determined a comparative determination region 80(for example, 0 to π/4, 3π/4 to 5π/4, 7π/4 to 2π in FIG. 2) of thesupply voltage waveform, and then outputs a voltage dip detectionsignal.

Furthermore, there are provided logical addition (OR) means 9 foroutputting a logical addition (OR) of output of the supply voltagewaveform comparing means 7 and output of the phase shift voltagewaveform comparing means 8, and voltage dip signal detection outputmeans 10 for outputting a voltage dip signal in the case where anyvoltage dip has been detected by the supply voltage waveform comparingmeans 7 or by the phase shift voltage waveform comparing means 8 uponreceiving the output of the logical addition (OR) means 9.

Operations of the instantaneous voltage dip detection device accordingto Embodiment 1 arranged as described above are hereinafter describedwith reference to FIGS. 1 to 3. As shown in FIG. 2, in the normal statethat there is neither abnormality in supply voltage nor voltage dip, thesupply voltage waveform comparing means 7 makes a comparison inmagnitude between the supply voltage waveform 11 and supply voltagewaveform threshold 12 of the power supply voltage 1 being insynchronization with each other by the phase lock means 3 in a regionwhere the supply voltage waveform threshold 12 determined by thedetermination region setting means 6 is not smaller than a predeterminedvalue, for example, at the phases of π/4 to 3π/4 and 5π/4 to 7π/4 (inrepeating fashion) of FIG. 2 being a region 70 in which magnitude of thethreshold is not smaller than 70% of the peak value.

Further, the phase shift voltage waveform comparing means 8 makes acomparison in magnitude between the phase shift voltage waveform 13 andphase shift voltage waveform threshold 14 being in synchronization witheach other in a region where the phase shift voltage waveform threshold14 determined by the determination region setting means 6 is not smallerthan a predetermined value, for example, at the phases of 0 to π/4, 3π/4to 5π/4 and 7π/4 to 2π (in repeating fashion) of FIG. 2 being a region80 in which magnitude of the threshold is not smaller than 70% of thepeak value.

As shown in FIG. 3, in the case where an instantaneous voltage dipoccurs at the phase π/2 in the supply voltage 1, the supply voltagewaveform comparing means 7 that compares amplitude in absolute value ofthe supply voltage waveform 11 and the supply voltage waveform threshold12 has a smaller supply voltage waveform 11 than the supply voltagewaveform threshold 12, and therefore outputs an instantaneous voltagedip signal. When it is determined that such an instantaneous voltage diphas occurred (i.e., as the phase is on the positive side, in the casewhere the supply voltage waveform 11 is less than the supply voltagewaveform threshold 12), a signal is outputted from the logical addition(OR) means 9, and a voltage dip detection signal is outputted from thevoltage dip detection signal output means 10.

As described above, since the supply voltage waveform comparing means 7determines the instantaneous voltage dip continuously at aninstantaneous value, any instantaneous voltage dip can be detected at ahigh speed, for example, at a cycle of not more than 1/10 of onewavelength. Further, since the voltage dip can be determined using onlya region where voltage waveform level for detecting the voltage dip islarger, stable and constant detection can be performed. Accordingly,when arranging a voltage compensation apparatus in combination of theinstantaneous voltage dip detection device, it becomes possible tocompensate an instantaneous voltage dip in a very short time.

Further, since a phase shift voltage waveform shifting a supply voltagewaveform by 90° is also utilized in the detection of the instantaneousvoltage dip, the instantaneous voltage dip detection device can be usedfor detecting any region, where voltage waveform level is large, of atleast either the supply voltage waveform or the phase shift voltagewaveform, and a determination region that is continuous in time can beobtained.

In addition, although an example in which phase shift voltage waveformis one is described above, it is possible that there are two or morephase shift voltage waveforms. For example, in the case of two phaseshift voltage waveforms, phase is shifted by every 60°. In this case,however, circuit arrangement will be complicated and therefore one phaseshift voltage waveform is preferably.

Embodiment 2

FIG. 4 is a block diagram showing an instantaneous voltage dip detectiondevice according to Embodiment 2 of the invention. In this Embodiment 2,second phase lock means 15 is provided for detecting zero voltage phase(zero-cross point) of the phase shift voltage waveform 13. The phaseshift voltage waveform threshold generating means 5 generates, insynchronization with the second phase lock means 15, a phase shiftvoltage waveform threshold 14 serving as a voltage dip determinationcriterion with respect to the phase shift voltage waveform 13. Theremaining part is arranged in the same manner as in FIG. 1, and the samereference numerals are designated to the same elements omitting furtherdescription.

In this Embodiment 2, even if there is any variation in phase shiftamount of the phase shift means 2, since a threshold is generated by thephase shift voltage waveform threshold generating means 5 on the basisof zero voltage phase of the output voltage waveform of the phase shiftmeans 2, the variation in phase shift amount can be compensated, andstable and constant detection can be performed.

Embodiment 3

FIG. 5 is a block diagram showing an instantaneous voltage dip detectiondevice according to Embodiment 3 of the invention. In this Embodiment 3,phase difference detection means 16 is provided. The phase differencedetection means 16 detects zero voltage phase of the phase shift voltagewaveform 13, and a difference from zero voltage phase (zero-cross point)of the supply voltage waveform 11 obtained from the phase lock means 3is obtained. The phase shift voltage waveform threshold generating means5 generates, in synchronization with the phase difference detectionmeans 16, a phase shift voltage waveform threshold 14 serving as avoltage dip determination criterion with respect to the phase shiftvoltage waveform 13. The remaining part is arranged in the same manneras in FIG. 1, and the same reference numerals are designated to the sameelements omitting further description.

In this Embodiment 3, even if there is any variation in phase shiftamount of the phase shift means 2, a phase difference from the phaselock means 3 is detected by the phase difference detection means 16 anda phase of the threshold generated by the phase shift voltage waveformthreshold generating means 5 is controlled by the output thereof.Therefore, even if there is any variation in phase shift amount of thephase shift means 2, the variation in phase shift amount can becompensated, and stable and constant detection can be performed.

Embodiment 4

In this embodiment, referring to the arrangements shown in FIGS. 1, 4and 5, the supply voltage waveform comparing means 7 and the phase shiftvoltage waveform comparing means 8 have a counter function not shown,and a voltage dip detection signal is generated only when it isdetermined that a voltage dip is generated continuously for apredetermined time set in the counter function. Malfunction due to noisecan be effectively prevented. It is preferable that the counter functionis provided with the logic addition (OR) means 9.

Embodiment 5

FIG. 6 is a block diagram showing in detail phase shifting meansemployed in an instantaneous voltage dip detection device according toEmbodiment 5 of the invention. The phase shift means 2 is an all-passfilter consisting of resistors 17, 18, 19, a capacitor 20 and anamplifier 21. Shifting operation is determined depending on a value(time constant CR) between the resistor 18 (constant R) and thecapacitor 20 (constant C). In order to set a shift angle to be within arange of 20° to 160°, the circuit constant value 1/(2πCR) is set to bewithin a range of 8 to 340. Each of the resistors and the capacitor isset to a value for phase shifting the supply voltage waveform 11 ofwhich supply voltage cycle is 55 Hz by about 90°, for example.

Generally, a differentiation circuit is sometimes employed as a methodof phase shifting a waveform by 90°. However, in the case of using adifferentiation circuit, a gain of high frequency component contained inthe supply voltage waveform becomes large, and a waveform of which outof alignment is large and which is not suitable for the voltage dipdetection is outputted (for example, see a phase shift voltage waveform13 b at the time of superimposition of harmonics shown in FIG. 8). Tosuppress this variation in waveform, it may be an idea to combine alow-pass filter circuit. In this case, however, a problem exists in thatthe low-pass filter may extinguish the sharp variation of the waveformgenerated at the time of voltage dip, thereby taking much time in thedetection.

According to this Embodiment 5, since an all-pass filter consisting ofresistors, capacitor and amplifier is used as phase shift means, itbecomes possible to establish the supply voltage waveform 11 and thegain of the phase shift voltage waveform 13 after the phase shifting byabout 90° to be almost equal. There is no need of reducing such a gainby combining a low-pass filter circuit to eliminate the high frequencycomponent as is required in the case of using a differentiation circuit.Thus, an advantage exists in that a phase shift waveform can begenerated with a simple circuit arrangement.

Embodiment 6

This embodiment shows an example of circuit arrangement of FIG. 5 inwhich the phase shift means 2 including an all-pass filter of FIG. 6 isused. FIG. 7 shows a phase shift voltage waveform 13 a in which thirdharmonic (of which phase is inverted by 180 degree) is superimposed by5% using an all-pass filter as phase shift means as shown in FIG. 5.FIG. 8 shows, as a comparative example, a phase shift voltage waveform13 b in which third harmonic (of which phase is inverted by 180 degree)is superimposed by 5% using a differentiation circuit as phase shiftmeans. For reasons of convenience, the threshold 12 a and threshold 14 aare the same as in FIG. 7.

In this Embodiment, the phase difference detection means 16 of FIG. 5has a recording function and harmonics level determination function.

Referring to FIG. 7, by detecting a difference (phase shift) between aphase value in the mentioned recording function that records a zerovoltage phase of the phase shift voltage waveform 13 at the normal timewhen no harmonics are superimposed on the supply voltage and a zerovoltage phase of the phase shift voltage waveform 13 a, the mentionedharmonics level determination function determines a level of harmonics.By a command of the harmonics level determination function, the phaseshift voltage waveform threshold generating means 5 generates athreshold 14 a that is reduced by 2% as compared with the normal time.For example, supposing that a threshold when harmonics are zero is160√{square root over (2)}, the threshold 14 a when the harmonics aresuperimposed by 5% is 157√{square root over (2)}(160×0.98 √{square rootover (2)}).

Specifically, in the case of using an all-pass filter shown in FIG. 6,due to circuit arrangement thereof, when the harmonics are superimposed,although the absolute value of the voltage waveform 13 a after the phaseshift is almost the same as that of the normal time phase shift voltagewaveform 13, there arises a phase shift 90. Utilizing this phenomenon,level of the harmonics are detected. On the other hand, as shown in FIG.8, in the case of using a differentiation circuit, due to circuitarrangement thereof, when the harmonics are superimposed, although therearises substantially no phase shift, the absolute value of the voltagewaveform 13 a after the phase shift has a large variation in waveformthereof as compared with that of the normal time phase shift voltagewaveform 13.

Therefore accuracy in the detection of instantaneous voltage dip islowered as compared with that in FIG. 7.

According to Embodiment 6 of the invention, even in the case ofsuperimposing the harmonics on the supply voltage, level of theharmonics are detected and threshold is reduced, thereby making itpossible to perform a stable detection of voltage dip.

Embodiment 7

This embodiment relates to an instantaneous voltage dip detection deviceof which circuit arrangement is based on FIGS. 1, 4 and 5. In thisEmbodiment 7, the power supply waveform threshold generating means 4 andthe phase shift voltage waveform threshold generating means 5 have awaveform recording function. Referring to FIG. 4, this waveformrecording function records sequentially the supply voltage waveform 11or the phase shift voltage waveform 13 in synchronization with the phaselock means 3 or the second phase lock means 15.

A predetermined value, for example, 20% of a recorded value is added toor subtracted from the recorded supply voltage waveform 11 or phaseshift voltage waveform 13 to obtain an upper limit threshold and a lowerlimit threshold. For example, a value of which waveform is shifted by±20% with respect to the previous waveform is established as an upperlimit threshold and a lower limit threshold.

The supply voltage waveform comparing means 7 and phase shift voltagewaveform comparing means 8 determines that an instantaneous voltage diphas occurred when the supply voltage waveform 11 or phase shift voltagewaveform 13 varies over the mentioned upper limit threshold and thelower limit threshold.

In this manner, an advantage is obtained such that even under thecondition that determination of a threshold is difficult, it is possibleto perform a stable detection of voltage dip. Although 20% is taken as apredetermined value is in the foregoing description, the percentage canbe changed depending upon the phase.

Embodiment 8

This embodiment relates to an instantaneous voltage dip detection deviceof the circuit arrangement shown in FIG. 5. FIG. 9 shows a transientwaveform at the time of generating an instantaneous voltage dip of thephase shift means 2 according to the foregoing Embodiment 5 of theinvention.

In the phase shift means 2 according to Embodiment 5 (see FIG. 6), whenoccurring a sharp instantaneous voltage dip at a predetermined phase,for example, at 3π/4 to π, a transient phenomenon 120 of the phase shiftvoltage waveform is generated, in which phase shift voltage waveform 13swings in the opposite direction of the phase shift voltage waveformthreshold 14 (voltage rising direction, i.e., positive direction).

At this predetermined phase, the phase shift voltage waveform thresholdgenerating means 5 generates not only a determination threshold ofvoltage dip but also a determination threshold of voltage rising, andthe phase shift voltage waveform comparing means 8 determines thevoltage dip based on both of the mentioned thresholds. In the case of asharp change in voltage, the determination is carried out based on thevoltage rising threshold and in the case of a slow change in voltage,the determination is carried out based on the voltage dip threshold.

According to this Embodiment 8, an advantage is obtained such that it ispossible to perform a speedy detection of instantaneous voltage dip overa wide range of phase.

Embodiment 9

This embodiment relates to an instantaneous voltage dip detection deviceof the circuit arrangement shown in FIG. 5. In this Embodiment 9, phaseshift voltage waveform threshold generating means 5 have a waveformrecording function. This waveform recording function recordssequentially the phase shift voltage waveform 13 in synchronization withthe phase difference detection means 16.

At a voltage dip determination threshold and at a predetermined phase,for example, at 3π/4 to π, the phase shift voltage waveform thresholdgenerating means 5 determines a voltage rising determination thresholdby adding or subtracting a predetermined value to or from a recordedwaveform value of the recorded phase shift voltage waveform 13, forexample, 20% of the value. The phase shift voltage waveform comparingmeans 8 determines a voltage dip based on the mentioned both thresholds.In the case of a sharp change in voltage, the determination is carriedout based on the voltage rising threshold and in the case of a slowchange in voltage, the determination is carried out based on the voltagedip threshold. Although 20% is taken as a predetermined value is in theforegoing description, the percentage can be changed depending upon thephase.

According to this Embodiment 9, an advantage is obtained such that it ispossible to perform a speedy detection of instantaneous voltage dip overa wide range of phase.

Embodiment 10

FIG. 10 is a block diagram showing an instantaneous voltage dipdetection device according to Embodiment 10 of the invention.

In this Embodiment 10, a phase lock means 3 is provided for detectingzero voltage phase (zero-cross point) of the supply voltage waveform 11which is a signal waveform of the supply voltage 1. In synchronizationwith an output of this phase lock means 3, the supply voltage waveformthreshold generating means 4 generates the supply voltage waveformthreshold 12 acting as a voltage dip determination reference withrespect to the supply voltage waveform 11.

The supply voltage waveform comparing means 7 determines that aninstantaneous voltage dip has occurred, in the case where the supplyvoltage waveform 11 is below the supply voltage waveform threshold(i.e., goes down beyond the threshold in the direction of AC zerovoltage) in a region where the determination region setting means 6 hasdetermined a comparative determination effective region (for example,π/10 to 9π/10, 11π/10 to 19π/10).

Waveform recording means 22 records sequentially the supply voltagewaveform in synchronization with the phase lock means 3, and recordedwaveform threshold generating means 23 establishes an upper limitthreshold and a lower limit threshold by adding and/or subtracting apredetermined value, for example, 20% based on a recorded waveform valueof the recorded supply voltage waveform. For example, a value of whichwaveform is shifted by ±20% with respect to the previous waveform isestablished as an upper limit threshold and a lower limit threshold. avalue of which waveform is shifted by ±20% with respect to the previouswaveform. Although the same value is taken as a predetermined value overthe all phase region in the foregoing description, any value differentdepending upon the phase can be set.

Recorded waveform comparing means 24 determines that an instantaneousvoltage dip has occurred in the case where the supply voltage waveform11 has changed over the mentioned upper limit threshold and lower limitthreshold in a region where the mentioned determination region settingmeans 6 determines as being a comparative determination effectiveregion. In this regard, although both upper limit threshold and lowerlimit threshold are used, it is preferable to use only the lower limitthreshold.

Continuity determination means 25 determines that a voltage dip in whichvoltage is reduced gently has occurred in the case where the supplyvoltage waveform comparing means 7 has determined occurrence of aninstantaneous voltage dip continuously for a predetermined time period(for example, for ¼ cycle).

Logical multiplication (AND) means 26 determines that an instantaneousvoltage dip has occurred in the case where both recorded waveformcomparing means 24 and supply voltage waveform comparing means 7 havedetermined occurrence of an instantaneous voltage dip. Thus, anadvantage is such that even in the case where high harmonics are mixedat a high level and occurrence of an instantaneous voltage dip iserroneously determined in the voltage waveform comparison, the recordedwaveform comparing means 24 determines the voltage dip rightly, enablingto perform a stable voltage dip detection. In the case of very gentlevoltage reduction, there may be a case where a difference between thecurrent waveform and the waveform preceding by 1 cycle is so small thatthe recorded waveform comparing means 24 cannot determine the voltagedip. Even in such a case, the continuity determination means 25 candetect the voltage dip.

Logical addition (OR) means 27 determines that an instantaneous voltagedip has occurred when either the logical multiplication (AND) means 26or the continuity determination means 25 has determined occurrence of aninstantaneous voltage dip.

As a result, even in the case where harmonics are mixed at a high leveland an instantaneous voltage dip of gentle voltage has occurred, it ispossible to perform a stable detection.

Embodiment 11

FIG. 11 is a block diagram showing an instantaneous voltage dipdetection device according to Embodiment 11 of the invention.

In this Embodiment 11, a phase lock means 3 is provided for detectingzero voltage phase (zero-cross point) of the supply voltage waveform 11that is a signal waveform of the supply voltage 1. In synchronizationwith an output of this phase lock means 3, the supply voltage waveformthreshold generating means 4 generates the supply voltage waveformthreshold 12 acting as a voltage dip determination reference withrespect to the supply voltage waveform 11.

The supply voltage waveform comparing means 7 determines that aninstantaneous voltage dip has occurred, in the case where the supplyvoltage waveform 11 is below the supply voltage waveform threshold(i.e., goes down beyond the threshold in the direction of AC zerovoltage in a region where the determination region setting means 6 hasdetermined a comparative determination effective region (for example,π/10 to 9π/10, 11π/10 to 19π/10).

Waveform recording means 22 records sequentially the supply voltagewaveform in synchronization with the phase lock means 3, and recordedwaveform threshold generating means 23 establishes an upper limitthreshold and a lower limit threshold by adding and/or subtracting apredetermined value, for example, 20% based on a recorded waveform valueof the recorded supply voltage waveform. For example, a value of whichwaveform is shifted by ±20% with respect to the previous waveform isestablished as an upper limit threshold and a lower limit threshold.Although the same value is taken as a predetermined value over the allphase region in the foregoing description, any value different dependingupon the phase can be set.

Recorded waveform comparing means 24 determines that an instantaneousvoltage dip has occurred in the case where the supply voltage waveform11 has changed over the mentioned upper limit threshold and lower limitthreshold in a region where the mentioned determination region settingmeans 6 determines as being a comparative determination effectiveregion. In this regard, although both upper limit threshold and lowerlimit threshold are used, it is preferable to use only the lower limitthreshold.

Continuity determination means 25 determines that a voltage dip in whichvoltage is reduced gently has occurred in the case where the supplyvoltage waveform comparing means 7 has determined occurrence of aninstantaneous voltage dip continuously for a predetermined time period(for example, for ¼ cycle).

Waveform integrating means 28, in synchronization with the phase lockmeans 3, integrates and outputs a predetermined calculation value (forexample, absolute value) of the supply voltage waveform 11 during thephase of 0 to π/10, 9π/10 to π, 19π/10 to 2π being near zero voltagephase.

Integrated threshold generating means 29 generates an integrated valueduring the mentioned phase (in this case 0 to π/10, 9π/10 to π, 19π/10to 2π) of sine wave of a voltage value detected as an instantaneousvoltage dip, the integrated value being an integration waveformthreshold serving as a voltage dip determination reference. Theintegration waveform threshold is preferably selected so that noisedetection sensitivity is low as compared with the recorded waveformthreshold from the viewpoint of preventing malfunction due to noisebecause there are much noise components in the region near zero voltagephase. For example, it is preferable that the integrated waveformthreshold is established to be a value that is 50% of a value of anideal waveform or previous waveform.

Integrated value comparing means 30 determines that an instantaneousvoltage dip has occurred in the case that an output of the waveformintegrating means 28 is below the integrated waveform threshold (i.e.,goes down beyond the threshold in the direction of AC zero voltage) in aregion where the determination region setting means 6 has determined acomparative determination effective region (in this case, 0 to π/10,9π/10 to π, 19π/10 to 2π).

Logical addition (OR) means 31 determines that an instantaneous voltagedip has occurred when either the voltage waveform comparing means 7 orthe integrated value comparing means 30 has determined occurrence of aninstantaneous voltage dip.

The logical multiplication (AND) means 26 determines that aninstantaneous voltage dip has occurred in the case where both recordedwaveform comparing means 24 and logical addition (OR) means 31 havedetermined occurrence of an instantaneous voltage dip.

In the region near zero voltage phase, influence of noise can re reducedby integration, enabling to perform stable voltage dip detection.Furthermore, an advantage is such that even in the case where harmonicsare mixed at a high level and occurrence of an instantaneous voltage dipis erroneously determined in the voltage waveform comparison, therecorded waveform comparing means 24 determines the voltage dip rightly,enabling to perform a stable voltage dip detection. In the case of verygentle voltage reduction, there may be a case where a difference betweenthe current waveform and the waveform preceding by 1 cycle is so smallthat the recorded waveform comparing means 24 cannot determine thevoltage dip. Even in such a case, the continuity determination means 25can detect the voltage dip.

Logical addition (OR) means 27 determines that an instantaneous voltagedip has occurred when either the logical multiplication (AND) means 26or the continuity determination means 25 has determined occurrence of aninstantaneous voltage dip.

As a result, even in the case where harmonics are mixed at a high leveland an instantaneous voltage dip of gentle voltage has occurred, it ispossible to perform a stable detection.

INDUSTRIAL APPLICABILITY

The present invention enables a voltage dip to be detected at a highspeed, and is effective for detection of instantaneous voltage dip indistribution network occurring due to lightning.

1. An instantaneous voltage dip detection device comprising: phaseshifting means for shifting a supply voltage waveform by a predeterminedangle and generating a phase shift voltage waveform; phase lock meansfor detecting the zero voltage phase of the supply voltage waveform;supply voltage waveform threshold generating means for generating asupply voltage waveform threshold acting as a voltage dip determinationreference with respect to said supply voltage waveform insynchronization with said phase lock means; phase shift voltage waveformthreshold generating means for generating a phase shift voltage waveformthreshold acting as a voltage dip determination reference with respectto said phase shift voltage waveform; determination region setting meansfor setting a part or all of absolute values of said supply voltagewaveform threshold and phase shift voltage waveform threshold that arelarger than a predetermined value as being a comparative determinationeffective region; supply voltage waveform comparing means for outputtinga voltage dip detection signal based on the comparison between saidsupply voltage waveform and the supply voltage waveform threshold, inthe case where said determination region setting means determines asbeing a comparative determination effective region of the supply voltagewaveform; and phase shift voltage waveform comparing means foroutputting a voltage dip detection signal based on the comparisonbetween said phase shift voltage waveform and the phase shift voltagewaveform threshold, in the case where said determination region settingmeans determines as being a comparative determination effective regionof the phase shift voltage waveform.
 2. The instantaneous voltage dipdetection device according to claim 1, wherein said phase shift voltagewaveform is a waveform shifted from the zero voltage phase of the supplyvoltage waveform by 90°.
 3. The instantaneous voltage dip detectiondevice according to claim 2 further comprising second phase lock meansthat detects the zero voltage phase of the supply voltage waveform,wherein said phase shift voltage waveform threshold generating meansgenerates, in synchronization with second phase lock means, a phaseshift voltage waveform threshold serving as a voltage dip determinationreference with respect to a phase shift voltage waveform.
 4. Theinstantaneous voltage dip detection device according to claim 3, whereinsaid supply voltage waveform comparing means and the phase shift voltagewaveform comparing means include a counter function, and utilizing saidcounter function, a voltage dip detection signal is generated only inthe case where it is determined that a voltage dip occurs continuouslyfor a predetermined time period.
 5. The instantaneous voltage dipdetection device according to claim 2 further comprising phasedifference detection means that detects the zero voltage phase of thesupply voltage waveform and obtains a phase difference from the zerovoltage phase of the supply voltage waveform obtained from said phaselock means, wherein said phase shift voltage waveform thresholdgenerating means generates, in synchronization with said phasedifference detection means, a phase shift voltage waveform thresholdserving as a voltage dip determination reference with respect to a phaseshift voltage waveform.
 6. The instantaneous voltage dip detectiondevice according to claim 5, wherein said supply voltage waveformcomparing means and the phase shift voltage waveform comparing meansinclude a counter function, and utilizing said counter function, avoltage dip detection signal is generated only in the case where it isdetermined that a voltage dip occurs continuously for a predeterminedtime period.
 7. The instantaneous voltage dip detection device accordingto claim 2, wherein said supply voltage waveform comparing means and thephase shift voltage waveform comparing means include a counter function,and utilizing said counter function, a voltage dip detection signal isgenerated only in the case where it is determined that a voltage dipoccurs continuously for a predetermined time period.
 8. Theinstantaneous voltage dip detection device according to claim 1 furthercomprising second phase lock means that detects the zero voltage phaseof the supply voltage waveform, wherein said phase shift voltagewaveform threshold generating means generates, in synchronization withsaid second phase lock means, a phase shift voltage waveform thresholdserving as a voltage dip determination reference with respect to a phaseshift voltage waveform.
 9. The instantaneous voltage dip detectiondevice according to claim 8, wherein said Supply voltage waveformcomparing means and the phase shift voltage waveform comparing meansinclude a counter function, and utilizing said counter function, avoltage dip detection a signal is generated only in the case where it isdetermined that a voltage dip occurs continuously for a predeterminedtime period.
 10. The instantaneous voltage dip detection deviceaccording to claim 1 further comprising phase difference detection meansthat detects the zero voltage phase of the supply voltage waveform andobtains a phase difference from the zero voltage phase of the supplyvoltage waveform obtained from said phase lock means, wherein said phaseshift voltage waveform threshold generating means generates, insynchronization with said phase difference detection means, a phaseshift voltage waveform threshold serving as a voltage dip determinationreference with respect to a phase shift voltage waveform.
 11. Theinstantaneous voltage dip detection device according to claim 10,wherein said supply voltage waveform comparing means and the phase shiftvoltage waveform comparing means include a counter function, andutilizing said counter function, a voltage dip detection signal isgenerated only in the case where it is determined that a voltage dipoccurs continuously for a predetermined time period.
 12. Theinstantaneous voltage dip detection device according to, claim 1,wherein said supply voltage waveform comparing means and the phase shiftvoltage waveform comparing means include a counter function, andutilizing said counter function, a voltage dip detection signal isgenerated only in the case where it is determined that a voltage dipoccurs continuously for a predetermined time period.
 13. Aninstantaneous voltage dip detection device comprising: phase shiftingmeans for shifting a supply voltage waveform by a predetermined angleand generating a phase shift voltage waveform; phase lock means fordetecting the zero voltage phase of the supply voltage waveform; supplyvoltage waveform threshold generating means for generating a supplyvoltage waveform threshold acting as a voltage dip determinationreference with respect to said supply voltage waveform insynchronization with said phase lock means; phase shift voltage waveformthreshold generating means for generating a phase shift voltage waveformthreshold acting as a voltage dip determination reference with respectto said phase shift voltage waveform; determination region setting meansfor setting a part or all of absolute values of said supply voltagewaveform threshold and phase shift voltage waveform threshold that arelarger than a predetermined value as being a comparative determinationeffective region; supply voltage waveform comparing means for outputtinga voltage dip detection signal based on the comparison between saidsupply voltage waveform and the supply voltage waveform threshold, inthe case where said determination region setting means determines asbeing a comparative determination effective region of the supply voltagewaveform; and phase shift voltage waveform comparing means foroutputting a voltage dip detection signal based on the comparisonbetween said phase shift voltage waveform and the phase shift voltagewaveform threshold, in the case where said determination region settingmeans determines as being a comparative determination effective regionof the phase shift voltage waveform; wherein said phase shift means isan all-pass filter consisting of resistors, capacitor and amplifier, anda circuit constant value 1/(2πCR) for carrying out phase shift operationis set to be within a range of 8 to
 340. 14. The instantaneous voltagedip detection device according to claim 13 further comprising phasedifference detection means for detecting the zero voltage phase of saidphase shift voltage waveform and obtaining a phase difference from thezero voltage phase of the supply voltage waveform obtained from saidphase lock means; wherein said phase difference detection means has arecording function for preliminarily recording the zero voltage phase ofthe phase shift voltage waveform at the normal time when no harmonicsare superimposed on the supply voltage, and harmonics leveldetermination function for determining a level of harmonics based on aphase shift quantity being a difference between the zero voltage phaseof the phase shift voltage waveform on which harmonics are superimposedand the zero voltage phase of the phase shift voltage waveform at thenormal time recorded by said recording means; and by a command of theharmonics level determination function, the phase shift voltage waveformthreshold generating means generates a threshold conforming to a levelof the harmonics.
 15. The instantaneous voltage dip detection deviceaccording to claim 13, wherein said power supply waveform thresholdgenerating means and the phase shift voltage waveform thresholdgenerating means have a waveform recording function to obtain an upperlimit threshold and a lower limit threshold by a predeterminedcalculation based on recorded waveforms; said supply voltage waveformcomparing means makes a comparison between said supply voltage waveformand the supply voltage waveform threshold at a predetermined phase andoutputs a voltage dip detection signal when being smaller than the lowerlimit threshold on the positive side of the phase and when being largerthan the upper limit threshold on the negative side of the phase; andphase shift voltage waveform comparing means makes a comparison betweensaid phase shift voltage waveform and the phase shift voltage waveformthreshold at a predetermined phase and outputs a voltage dip detectionsignal when being smaller than the lower limit threshold or larger thanthe upper limit threshold on the positive side of the phase, and whenbeing larger than the lower limit threshold or smaller than the upperlimit threshold on the negative side of the phase on the negative sideof the phase.
 16. The instantaneous voltage dip detection deviceaccording to claim 13, wherein said phase shift voltage waveformthreshold generating means establishes also a voltage risingdetermination reference value with respect to a phase shift voltagewaveform as a threshold at a predetermined phase; said supply voltagewaveform comparing means makes a comparison between said phase shiftvoltage waveform and a voltage dip determination reference threshold ofthe phase shift voltage waveform in the case where said determinationregion setting means determines as being a comparative determinationeffective region of the phase shift voltage waveform, outputs a voltagedip detection signal when being smaller on the positive side of thephase and when being larger on the negative side of the phase; and insaid predetermined phase, said supply voltage waveform comparing meansmakes a comparison between said phase shift voltage waveform and thevoltage rising determination reference threshold, and outputs a voltagedip detection signal when being larger on the positive side of the phaseand when being smaller on the negative side of the phase.
 17. Theinstantaneous voltage dip detection device according to claim 13,wherein said phase shift voltage waveform threshold generating means hasa recording function to record sequentially the phase shift voltagewaveform, establishes a voltage dip determination reference value withrespect to said phase shift voltage waveform and a voltage risingdetermination reference value obtained by adding a predetermined valueto a recorded waveform of an instantaneous value of the phase shiftvoltage waveform at a predetermined phase as a threshold; said supplyvoltage waveform comparing means makes a comparison between said phaseshift voltage waveform and a voltage dip determination referencethreshold of the phase shift voltage waveform in the case where saiddetermination region setting means determines as being a comparativedetermination effective region of the phase shift voltage waveform,outputs a voltage dip detection signal when being smaller on thepositive side of the phase and when being larger on the negative side ofthe phase; and in said predetermined phase, said supply voltage waveformcomparing means makes a comparison between said phase shift voltagewaveform and the voltage rising determination reference threshold, andoutputs a voltage dip detection signal when being larger on the positiveside of the phase and when being smaller on the negative side of thephase.
 18. An instantaneous voltage dip detection device comprising:phase lock means for detecting the zero voltage phase of the supplyvoltage waveform; supply voltage waveform threshold generating means forgenerating a supply voltage waveform threshold acting as a voltage dipdetermination reference with respect to said supply voltage waveform insynchronization with said phase lock means; waveform recording means forrecording sequentially supply voltage waveforms in synchronization withsaid phase lock means; recorded waveform threshold generating means forgenerating a lower limit threshold or an upper limit threshold by apredetermined calculation based on said recorded waveforms;determination region setting means for setting a comparativedetermination effective region in synchronization with said phase lockmeans; supply voltage waveform comparing means for outputting a voltagedip detection signal based on the comparison between said supply voltagewaveform and the supply voltage waveform threshold, in the case wheresaid determination region setting means determines as being acomparative determination effective region of the supply voltagewaveform; recorded waveform comparing means for outputting a voltage dipdetection signal based on the comparison between said supply voltagewaveform and the recorded waveform threshold, in the case where saiddetermination region setting means determines as being a comparativedetermination effective region of the recorded waveform; continuitydetermination means for determining that said supply voltage waveformcomparing means outputs the voltage dip detection signal continuouslyfor a predetermined time period; logical multiplication (AND) meansbetween an output of said supply voltage waveform comparing means and anoutput of said recorded waveform comparing means; and voltage dipdetection output means for outputting a voltage dip detection output bylogical addition (OR) between an output of said logical multiplication(AND) means and an output of said continuity determination means. 19.The instantaneous voltage dip detection device according to claim 18further comprising: waveform integrating means for integrating apredetermined calculation value of the supply voltage waveform insynchronization with the phase lock means; integrated thresholdgenerating means for generating, in synchronization with said phase lockmeans, a supply voltage integration threshold serving as a voltage dipdetermination reference with respect to a supply voltage integratedvalue; integrated value comparing means for outputting a voltage dipsignal based on a comparison between said supply voltage waveformintegrated value and the integrated threshold in the case that saiddetermination region setting means has determined a comparativedetermination effective region of the waveform integrated value; logicaladdition (OR) means between an output of said supply voltage waveformcomparing means and an output of said integrated value comparing means;and logical multiplication (AND) means between an output of said logicaladdition (OR) means and an output of said recorded waveform comparingmeans; wherein an input of said logical multiplication (AND) means isany of an output of said recorded waveform comparing means, an output ofsaid supply voltage waveform comparing means, or an output of saidintegrated value comparing means.